Challenge 8 : Find macro origin

Hi All,

check below Challenge to revise your concepts related to macro placement guidelines.

Consider one block with below specification:

  • core-to-die : 0
  • Floorplan Shape : Rectangle
  • Max routing layers : M13
  • site row height : 0.169
  • site row width : 0.048
  • FinFET grid (Y) : 0.026
  • FinFET grid (X) : 0.0005

Consider below Macro:

  • Macro pins in M5 layers in Horizontal layers , Pitch : 0.076
  • macro width : 10um


macro

Goal:
Need to Place this macro in block without having FEOL drc and macro pins should be on track. Comment what should be macro origin i.e x,y location of lower left corner.

Share your answer in comment.





Comments

  1. AnonymousAugust 19, 2025 at 3:33 PM

    Using tcic

    ReplyDelete
    Replies
    1. JigneshAugust 19, 2025 at 4:01 PM

      Thank you for being first one to comment here.. (this post was viewed by 168 but no one replied)

      Could you please elaborate how tcic make sure macro on legal location and all macro pins are on track ?

      Delete
  2. choisunAugust 19, 2025 at 9:03 PM

    As per my knowledge, macro must be placed aligned with fin grid for feol clean + pin track aligned for good routing(clean drc)

    so we can get minimum origin as mcp of fin grid and pitch ( 0.988 , 0.0005 ).
    If the requirement include on site aligned place then will have bigger value.

    ReplyDelete
    Replies
    1. JigneshAugust 19, 2025 at 9:28 PM

      Excellent!
      Choisun,

      Yes. You are totally correct here. Macro can be placed at any location vertically in multiple of 0.988.

      Fyi .there is not need to have macro aligned to site.

      This encourages me to take this question to next level..!(Keep watching this blog, will create new challenges more complex to current one)

      Delete
  3. AnonymousAugust 19, 2025 at 9:32 PM

    Can you elaborate more on how this is calculated?

    ReplyDelete
    Replies
    1. JigneshAugust 20, 2025 at 9:11 AM

      Understand this way...
      1)To have feol/based DRC clean, macro should be placed in multiple of finfet grid
      2) to have macro pin on track, macro should be placed multiple of track pitch (in this example, tracks are starting at 0 so)

      To meet both conditions, LCM of 0.026 and 0.076 =0.988

      So if macro is placed in multiple of 0.988, both conditions will be met.

      Let me know if any further clarifications required.

      Delete

Post a Comment