Floorplan: A Comprehensive Guide Bridging Theory and Practical Insights
Hi All,
Floorplanning is a critical step in the design and implementation of modern integrated circuits, serving as the foundation for achieving optimal performance, power, and area. This guide, "Mastering Floorplanning: A Comprehensive Guide Bridging Theory and Practical Insights", is designed to demystify the complexities of floorplanning by seamlessly integrating theoretical concepts with real-world applications.
I am creating separate pages for detail explanation of each topics related to Floorplan. If you are starting your Physical Design Journey, I would suggest to go through each post by clicking in specific order mentioned as below.
- Floorplan stage : Key Inputs and Prerequisites
- Floorplan Basics: Learn the Terms Without the Complexity
- Mastering Floorplanning: A Comprehensive Step-by-Step Guide
- Placement and Routing Blockages: Strategies for Optimal Design Flow
- Best Practices for Macro Placement Guideline in ASIC Physical Design
- Physical and Spare Cells: Foundations of Modern IC Design
- Floorplan : Essential Sanity Checks before moving to next stage
- To be continued....
Once you have completed few topics from above list, you can revise Floorplan concepts based on below Exercises and Challenges.
- What will be track_offset in below test case
- Core width/height calculation
- Challenge 5 : calculate total stcell count
- Challenge 7 : Latch-up issue
- Challenge 8 : Find macro origin
- Challenge 9 : Full-Chip Floorplan
Comments
Post a Comment